Renesas Development Mainboard

RS-G2L100 / RS-V2L100

Renesas Development board

The Geniatech AHAURA RS-G2L100 / AKITIO RS-V2L100 Development Board are based on Renesas low power highly efficient powerful RZ/G2L / RZ/V2L SoC, which is jointly designed & manufactured in closed collaboration with Geniatech & Renesas.
The board includes a high-performance 64-bit Dual-core (Cortex A55) processor, HDMI out display support at resolutions up to 1080P, hardware video decodes up to 1080P, up to 4GB of RAM, dual-band 2.4/5.0 GHz wireless LAN, Bluetooth (BT 5.1 compliant BLE) two Gigabit Ethernet, two USB 2.0 and LTE Cat-M1, as well as supporting different high-speed interfaces such as MIPI-DSI / MIPI-CSI / USB2.0 and low speed 96Boards Mezzanine Connector.

arm Development Board with 4G/LTE
AI Development Board with 4G/LTE

Product Specifications

    Renesas RZ/G2L
    Renesas RZ/V2L
  • OS
    Yocto (Linux)
  • CPU
    2xCortex-A55 core up to 1.2GHz per core
    1x Cortex-M33 core up to 200MHz
  • DDR4
    4GB(4 or 8G optional)
    8GB eMMC 5.1 (16/64/128GB optional)
  • Ethernet
    2*RJ45, 10/100/1000M
  • WiFi
    WIFI Module 2.4G/5.8G (optional)
  • Bluetooth
    BT4.0 (integrated in the WiFi module)
  • 4G LTE
  • HDMI Out
    *1(up to 1080P60)
  • USB 2.0
  • SIM Card slot
  • DC IN
    *1 (12V/3A Power adapter,Bootup with electrify)
  • Connectivity I/O
    1x High-Speed Connector1
    • intergrade MIPI-CSI/MIPI-DSI/USB/SD1 function
    1x High-Speed Connector1
    • Support SPI/GPIO
    1x Low-Speed Connector1
    1x Low-Speed Connector2
    • Speak/MIC
  • Power
    DC 12V / 3A (12V/3A Power adapter,Bootup with electrify)
  • Dimensions
  • Debug Interface
    • Arm® CoreSightTM architecture
    • JTAG / SWD interface supported
    • ETF 16 KBytes for program flow trace (each cluster)
    • JTAG Disable supported

HW Block Diagram

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